A factory tries to make a million chips alike. Security engineers find a use for the ways it cannot. Under the apparent sameness of silicon sit microscopic manufacturing variations, differences that can give one device an identity its neighbors do not share. Jmem Tek’s business begins with those differences. The small irregularity becomes a credential.
There is something pleasingly contrary about this. A semiconductor company usually sells precision. Here, part of the value comes from the physical individuality that precision leaves behind. Jmem Tek calls its approach an invisible key: derive a root secret when needed, rather than leave a permanent copy waiting in memory. The attraction is straightforward. A secret that has no persistent storage location gives an attacker one fewer place to look.
- The idea: use a chip’s physical fingerprint to anchor device identity.
- The product: security IP, custom chip design and the Zanker security chip.
- The evidence: public NIST algorithm validation and named semiconductor partnerships.
- The useful distinction: quantum-resistant math and protection of the hardware doing that math are separate jobs.
The fingerprint in the factory
Jmem Tek’s version of a physical unclonable function, or PUF, is called JPUF. It derives device-specific responses from semiconductor characteristics. The company describes the resulting keys as transient: they exist when required instead of remaining stored as root secrets in nonvolatile memory. That is the mechanism behind the invisible-key language, rather than a claim that cryptography has somehow escaped physics.
Physics, in fact, supplies the complication. A chip must remain recognizable when its temperature changes, its supply voltage moves or its circuitry ages. A fingerprint that forgets its owner is an awkward security feature. Jmem Tek says JPUF incorporates on-chip error correction and anti-aging algorithms to support repeatable key generation. These details deserve attention because reliability and security meet at precisely this point: can the same device recover the right secret throughout its working life?
Three jobs, one small chip
A hardware fingerprint answers a question about identity. It does not, by itself, replace public-key cryptography. Jmem Tek pairs it with JCrypt, a hardware accelerator for cryptographic computation. Its supported post-quantum algorithms include ML-KEM for establishing shared secrets and ML-DSA for digital signatures. The engine also supports established cryptographic building blocks, including AES and SHA3, giving customers components for a migration rather than demanding that everything change at once.
Then comes a less cinematic adversary. Someone need not defeat an algorithm’s mathematics if the machine running it leaks useful information through its power consumption or electromagnetic emissions. JShield addresses side-channel and fault-injection attacks with hardware safeguards. Jmem Tek describes masking and power-and-clock design measures intended to make observable behavior less useful to an attacker. A quantum-resistant calculation still needs a careful physical implementation.
JRoot combines these layers into a root-of-trust architecture, the foundation used to check devices, firmware and cryptographic operations. Zanker is the company’s security chip offering that brings PUF technology, post-quantum algorithms and side-channel protection into silicon. Buyers can consider a chip or integrate security IP into a design of their own. That choice matters: semiconductor customers rarely have identical systems, schedules or power budgets.
A certificate with a precise meaning
The strongest checkable technical milestone is unusually unglamorous: a record number. NIST’s A7290 entry, first validated on July 31, 2025, lists Jmem Technology’s hardware cryptographic engine with Zanker as its operating environment. The listed capabilities include ML-KEM, ML-DSA, AES, EdDSA and SHA3. This is a concrete external record against which a customer can check the algorithm claim.
NIST algorithm-validation record
First validated: 31 July 2025
The boundary matters. NIST’s Cryptographic Algorithm Validation Program checks implementations of specified algorithms. Validation of a complete cryptographic module is a different undertaking. A7290 should therefore be read for what it covers, rather than stretched into a general guarantee about every product, every integration or every physical attack. For a procurement team, that precision is useful. Certificates are valuable partly because their limits can be inspected.
The customer is the person designing the machine
Jmem Tek operates upstream of the finished device. Its IP licensing offering gives chip designers security components they can integrate; its IC design services cover work from front-end architecture through back-end implementation. The commercial menu includes design expertise as well as reusable circuitry. A customer might want a security chip, a licensed block or help developing custom silicon.
The proposed applications make the logic tangible. For drones, Jmem Tek describes secure boot, protected telemetry and device authentication. For vehicles, it describes verifying firmware updates and authenticating connected systems. In financial equipment and data infrastructure, identity and cryptographic key handling become part of the design conversation. These are target applications, not a roll call of confirmed deployments. The common buyer is a manufacturer or integrator trying to make a machine trustworthy before it leaves the factory.
The surrounding market already has substantial suppliers. Synopsys offers PUF security IP; Rambus offers root-of-trust and quantum-safe security IP. Jmem Tek’s distinguishing proposition is its particular combination of PUF-derived identity, post-quantum acceleration, physical defenses and custom design services. The sensible comparison is the fit of that combination to a customer’s chip, including the required process, interfaces and assurance work.
A security idea needs a route into silicon
The company’s milestone record dates its founding to October 2022 and its Silicon Valley office to September 2024. John Chang leads it as founder and CEO; Paul Lo is co-founder and CTO. Their published biographies combine semiconductor business experience with digital and analog IC design. The company’s March 2026 announcement identifies Taiwan as its headquarters, with US expansion operations. Its international story is about reaching designers as well as developing circuitry.
In December 2024, an Andes Technology partnership described a security chip pairing Andes’ N25F RISC-V processor with Jmem Tek’s hardware security module IP. Jmem Tek also joined Andes’ AndeSentry framework. Chang put the processor’s role plainly:
“RISC-V processors provide the foundation for the next generation of IoT devices”John Chang, Andes partnership announcement, December 2024
Silicon Catalyst announced Jmem Tek’s admission in November 2024. Two further routes appeared in March 2026: the company announced participation in Intel Foundry’s IP and Chiplet Alliance programs and membership in GlobalFoundries’ GlobalSolutions IP partner network. My reading is that these relationships address an ordinary semiconductor problem: a design must reach customers through processes and ecosystems they can actually use. Membership itself should not be confused with a customer order.
The dollars behind the invisible key
SparkLabs’ portfolio page reports a $5 million pre-Series A in the first quarter of 2025; Jmem Tek’s own history places its Pre-A completion in March. Those are financing figures, rather than a price for Zanker or an IP license. They describe capital behind the business, not what an individual engineering team would pay to adopt it.
A separate commitment belongs to its work with Quantum eMotion. In March 2026, that partner described more than $2.5 million in combined development investment and up to $600,000 in NRC IRAP support to Quantum eMotion. The figures concern the joint R&D program and partner support, respectively. The release displays dollar amounts without specifying currency.
The May 2026 consortium agreement formalized plans for a Universal Security SoC combining Quantum eMotion’s quantum entropy source with Jmem Tek’s secure chip capabilities. Its development plan includes a prototype, PCIe boards, server appliances and software interfaces, with a project term through June 2027. Future commercial revenue is to be shared according to contributions under an agreed valuation model. This is development work with a commercialization framework; planned deliverables should be read as plans.
What an engineer can borrow
The useful lesson is a way of dividing the problem. Ask where a device’s identity originates. Ask which algorithms it runs. Ask what its physical behavior reveals. Then ask how all three fit into the surrounding system. Jmem Tek’s portfolio makes those questions visible, each attached to a different piece of engineering.
Adoption still depends on the actual machine. PUF repeatability must suit its operating conditions; the cryptographic workload must justify the integration; the required assurance must match the validation scope. A root of trust supplies a starting point for checks, while the rest of the system must enforce them. Jmem Tek’s intriguing idea is that the starting point can come from the chip’s own individuality. The factory’s tiny differences get a second career.