risc-v
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Michael Gao Is Building a Chip for the Mathematics of Trust
A teenage encounter with Bitcoin taught Michael Gao what specialized silicon could do. Now he is trying to give zero-knowledge proofs and advanced cryptography a computer architecture of their own.
Bo Wang’s Second Act Is an Open Bet on Computing
After nearly a quarter-century inside Intel, Bo Wang crossed from an established chip platform to a young RISC-V company. His ESWIN chapter is a study in what it takes to turn an open instruction set into products, partnerships and an international business.
Dave Kelf
Dave Kelf is the CEO of Breker Verification Systems, a San Jose-based EDA company whose test suite synthesis technology automates verification of large, complex chips including more than half of the world's RISC-V processor core projects. A UK-trained engineer turned marketing and business leader, Kelf spent three decades across Cadence, Synopsys, Co-Design Automation, Novas, and OneSpin, where he helped introduce and grow the SystemVerilog language and the Verdi debug environment. He rose from Breker's chief marketing officer to chief executive in October 2021 and has since guided the company through back-to-back years of 35 percent revenue growth.
Debbie Marr
Dr. Debbie Marr is the co-founder, CEO and President of AheadComputing, a Beaverton, Oregon startup building high-performance 64-bit RISC-V CPU cores. A former Intel Fellow and Chief Architect of Intel's Advanced Architecture Development Group, she spent 33 years shaping processors from the i386 era to modern Core and Xeon chips, served as server architect of the Pentium Pro, turned Hyper-Threading from concept into shipping product on the Pentium 4, and was chief architect of the 4th Gen Core (Haswell). She holds a PhD from the University of Michigan, more than 40 patents and 30+ published papers, and in 2024 left Intel with three fellow architects to prove that open architectures can deliver top-tier performance because, in her words, everybody deserves better compute.
Sameer Wasson
Sameer Wasson is the CEO of MIPS, the storied semiconductor IP company now reborn as a RISC-V pure-play targeting the physical AI era. He joined in September 2023 after 18 years at Texas Instruments, where he ran the Processors business and earlier built TI's mmWave radar franchise. MIPS is now a subsidiary of GlobalFoundries.
Frank Ferrante
Frank Ferrante is the CEO of ForwardEdge ASIC, a Lockheed Martin subsidiary dedicated to advancing U.S. domestic semiconductor chip design. A 30-year veteran of the semiconductor industry, Ferrante has held leadership roles at Intel (Senior Director of Military, Aerospace and Government), Wolfspeed (VP of Worldwide Automotive Sales and Marketing), and Altera. He is a vocal advocate for U.S. advanced manufacturing policy, having advised policymakers on the CHIPS Act, SHIP, and RAMP-C initiatives. Under his leadership, ForwardEdge ASIC achieved U.S. Government Trusted IC Vendor Status in February 2026 and selected the MIPS S8200 for mission-critical autonomous platform ASICs.
Markos Georghiades
Markos Georghiades is an Engineering Partner at Andreessen Horowitz's crypto division (a16z crypto), where he focuses on cryptography and core development of Jolt - a16z's open-source zero-knowledge virtual machine (zkVM). An undergraduate studying Computer Science and Mathematics at the University of Waterloo, he has co-authored multiple research breakthroughs: helping Jolt achieve a 6x throughput speedup (over 1 million RISC-V cycles/sec), enabling true zero-knowledge proofs via the NovaBlindFold technique, and implementing 64-bit proving without performance slowdown. His GitHub bio - 'sumcheck is love sumcheck is life' - says everything you need to know about where his obsessions lie.