In chip design, a second thought is an expensive luxury. Once a design has been etched into silicon, correcting it can mean another set of manufacturing masks, another wait at the foundry, and a conversation nobody wants with the finance team. Flex Logix built a business around the possibility that a chip might be allowed to change its mind.
The Mountain View company sold EFLX, a miniature field-programmable gate array that could be placed inside a customer's custom chip. That distinction is the whole pitch. A separate FPGA sits next to a chip; an embedded FPGA becomes part of it. The customer gets a small patch of circuitry whose job can be rewritten after the rest of the silicon is fixed. New protocol? Security change? A customer-specific function nobody specified at tape-out? The little patch has somewhere to put it.
- The productProgrammable logic and AI/DSP compute blocks licensed to chip designers.
- The proofFlex Logix used its own embedded FPGA to work around a problem in its AI chip.
- The turnIt quit selling that chip in 2023 and licensed the architecture instead.
A small square with a large bill attached
The company's best demonstration began as an internal argument. When Flex Logix designed its InferX X1 edge AI accelerator, some engineers questioned whether it was worth putting an EFLX block on the chip. The planned uses - a GPIO interface and help with debugging - hardly sounded urgent enough to spend roughly one square millimeter of 16 nm silicon. They included it anyway, partly to show customers that the company used its own technology.
Then chip bring-up exposed a problem that software alone could not immediately solve. A partial re-spin appeared likely. According to a 2022 account by Flex Logix's Andy Jaros, the team routed a fix through the on-chip EFLX block, adding a function they had not imagined during the design. The company said the workaround preserved its speed and functional targets, avoided several million dollars in mask fees, and saved six to nine months before sampling full-speed chips. That is a company account, not an audited cost statement. Even so, the causal point is unusually concrete: silicon reserved for uncertainty became useful precisely because the team could not know the mistake in advance.
“We give people a way to change their silicon (chips) without changing their silicon.”Geoff Tate, co-founder and CEO, in 2015
Fixed functions
plus separate FPGA
The trade: reserve chip area and pay for IP now to gain a hardware update path later.
The question that made a second product
Flex Logix began in 2014 with Geoff Tate, formerly of Rambus and AMD, and Cheng Wang, whose interconnect work grew out of research with UCLA professor Dejan Markovic. The founding idea was not merely a smaller FPGA. It was an interconnect architecture that could make programmable fabric practical as an IP block for many different manufacturing processes. The company emerged from stealth in 2015, and its technical team won an ISSCC paper award for the work behind EFLX.
Customers soon asked a different question: could that programmable fabric run AI? Wang studied what AI inference really needed and designed a more specialized compute architecture using the team's reconfigurable interconnect. The board liked the performance and area results enough to tell the team to make a chip. InferX X1 followed in 2020, aimed at running trained vision models near the camera or machine rather than sending every frame to a distant data center. Flex Logix later put it on PCIe boards and M.2 modules, and built the InferX Hawk mini-ITX system around it.
The customer list explains why EFLX had a market before the AI adventure. Dialog Semiconductor licensed it for configurable mixed-signal chips. Socionext chose EFLX for a 7 nm ASIC serving a 5G base-station platform, where carrier requirements can change after fabrication. DARPA expanded access for its research teams, which might need to modify prototype circuits after tape-out. Renesas used Flex Logix IP in its ForgeFPGA line. These are buyers with a practical reason to pay for rewriteable hardware, not spectators admiring a clever circuit.
The chip was real. The market was smaller.
The $55 million Series D in 2021, led by Mithril Capital Management with Lux, Eclipse Ventures and the Tate Family Trust participating, was meant to help scale inference hardware and support. The product was real, but the business arithmetic was less charming. By 2023 Tate told EE Times that chip and board buyers were too few, and most potential orders were not large enough. Automotive might have offered volume, but he judged it a difficult market for a startup to enter. Meanwhile, existing EFLX customers were asking to integrate InferX into their own chips.
So Flex Logix stopped selling the X1 hardware and made InferX available as licensable AI and digital signal processing IP. The hardware could now live in someone else's system-on-chip, with different software stacks for inference and signal processing. An FFT for a communications device is a different purchase from an object detector for a camera, but the underlying compute blocks and flexible interconnect could serve both. The company had returned to its original commercial skill: design a useful block, give customers tools to use it, and collect licensing revenue rather than wait for its own board to be chosen.
This is where its position in the semiconductor market becomes clearer. Flex Logix was not a foundry making wafers for everyone, nor a GPU vendor trying to win every edge box. It was a supplier of intellectual property to companies making custom silicon. Its public business model included an upfront license for design files and tools, continuing compiler fees and royalties. EFLX competed with other embedded FPGA suppliers such as QuickLogic, Achronix and Menta. InferX competed for chip real estate with GPUs, standalone FPGAs, dedicated accelerators and plain old processor code. Its case was strongest when a customer needed local performance and expected the workload to change.
The useful part of being wrong
The lesson is easy to romanticize and harder to copy. Putting a programmable block in every design would waste silicon and money. The wager makes sense when a product will stay in the field for years, standards or algorithms may shift, a mask re-spin would be painful, and the team has the tools and expertise to program the block safely. The same discipline applies to business models: Flex Logix did not discover that chips are bad. It discovered that its buyers wanted the architecture inside chips they already planned to make.
At its tenth anniversary in June 2024, the company reported more than 25 customers, over 40 design wins, and more than 100 patents and applications. It announced EFLX 3.0 and work on the eXpreso compiler. That November, Analog Devices acquired Flex Logix's technology assets and team for undisclosed terms, saying the embedded FPGA capability would strengthen its digital portfolio. The stand-alone company's last move was, fittingly, to become part of a larger chipmaker's design.
The small square of EFLX in the X1 did not rescue the X1 business. It did something more useful for the story: it proved the original idea under pressure. A good option is valuable before anyone knows exactly why it will be needed. Flex Logix learned that twice, once on a die and once on a balance sheet.