Breaking
Quadric raises $30M Series C - January 2026 Product revenue tripled in 2025 vs 2024 Chimera QC named 2025 Best Edge AI Processor IP One core scales 1 to 864 TOPS Runs LLMs up to 30 billion parameters on-device Design wins: Tier IV of Japan, edge-server LLM silicon ~$76M raised across seed to Series C Quadric raises $30M Series C - January 2026 Product revenue tripled in 2025 vs 2024 Chimera QC named 2025 Best Edge AI Processor IP One core scales 1 to 864 TOPS Runs LLMs up to 30 billion parameters on-device Design wins: Tier IV of Japan, edge-server LLM silicon ~$76M raised across seed to Series C
Company ProfileSemiconductor IPEst. 2016

The blueprint, photographed. Quadric doesn't ship a chip you can hold. It ships the idea of one - a processor design that gets stamped into other companies' silicon, then quietly decides how well your phone, your camera, and your car think.

The AI Chip That Refuses to Go Obsolete

Inside the on-device AI IP company betting that the smartest processor is the one you can reprogram - not replace.

1–864
TOPS per core
$76M
total raised
30B
LLM params on-device
2025 revenue growth
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The Pitch

A Semiconductor Company With No Chips

Here is a slightly odd fact about Quadric: it is a semiconductor company that does not sell semiconductors. You cannot buy a Quadric chip, hold a Quadric chip, or find a Quadric chip if you pry open your phone. What Quadric sells is the design - the arrangement of logic that another company licenses, tapes out, and manufactures inside its own system-on-chip. In the trade this is called IP, intellectual property, which is a grand name for "the part of the chip you paid someone else to figure out."

This is a good business when your idea is the hard part, and Quadric's idea is a specifically hard one. Most devices that do AI - detecting a face, transcribing a voice, keeping a car in its lane - contain a neural processing unit, or NPU, a chunk of silicon purpose-built to run neural networks very fast and very efficiently. The trouble with purpose-built things is that the purpose keeps changing. Build a great NPU for the models of 2022 and you may find that the models of 2024 use an operation your hardware simply cannot perform. Now your fast, efficient, expensive accelerator is a fast, efficient paperweight, and your product needs a new chip, which takes years and millions of dollars.

Quadric's answer, sold under the name Chimera, is to make the AI core fully programmable in the first place - to fuse the raw math throughput of a neural accelerator with the general-purpose flexibility of a digital signal processor, the workhorse chip that has handled audio and radio and sensor data for decades. One core, two jobs, and crucially: when a new kind of model appears, you write software for it rather than melting down the hardware. The company likes to point out that when large language models and vision transformers arrived - two model types that stumped a great many production NPUs - it added support with a software port and no hardware changes at all.

"One unified architecture for ML inference plus pre- and post-processing - a neural accelerator with the full C++ programmability of a modern DSP."

- How Quadric describes the Chimera family
2016
Founded
3
Co-founders
~66
Employees
4
Funding rounds
2025
Best Edge AI IP
Origins

From Bitcoin Hardware to Neural Nets

Quadric was founded in 2016 by three engineers - Veerbhan Kheterpal, Nigel Drego, and Daniel Firu - who had previously built hardware for 21 Inc, a bitcoin computing company. That lineage matters more than it sounds. Designing custom silicon to mine cryptocurrency is an education in a very specific discipline: squeezing the maximum useful computation out of the minimum power and silicon area, because in that world the margins are the whole game. The trio, with pedigrees from MIT and Carnegie Mellon, took that instinct and pointed it at a different target - the messy, fast-moving problem of running AI on devices at the edge, away from the data center.

The founders still run the company: Kheterpal as CEO, Drego as CTO, Firu as chief product officer. It is a small, deeply technical shop - roughly 66 people - which is roughly what you would expect for a firm whose product is essentially a very good idea rendered in Verilog and C++. You do not need a factory to sell a blueprint. You need engineers, a toolchain, and customers willing to bet their next chip on you.

VK

Veerbhan Kheterpal

Co-Founder & CEO
ND

Nigel Drego

Co-Founder & CTO
DF

Daniel Firu

Co-Founder & CPO

The Product

Chimera, Explained

The name is a small joke that happens to be accurate. In Greek myth the chimera is a single creature stitched from two others; Quadric's Chimera is a single processor stitched from two normally-separate ones. On one side, the wide, parallel matrix math that neural networks devour. On the other, the branchy, control-heavy code that everything around the neural network needs - resizing an image, filtering a signal, deciding what to do with a result. Traditional designs use two blocks and shuttle data between them, which costs power and latency. Chimera runs both on the same core.

The other notable trick is range. A single architecture stretches from 1 TOPS - modest, sip-of-power inference for a sensor or a wearable - all the way to 864 TOPS, the kind of throughput an autonomous vehicle or an edge server needs. That means a chip designer can pick a point on the curve without switching programming models, and Quadric offers automotive safety-enhanced (ASIL-ready) versions for customers whose silicon has to satisfy a car's functional-safety requirements rather than a phone's.

Chimera GPNPU - at a glance

1 TOPS · wearables & sensors864 TOPS · automotive & edge servers
ArchitectureUnified NPU + DSP, single core
ProgrammabilityFull C++ kernels
Performance range1 – 864 TOPS
LLM supportUp to 30B parameters
Model formatsONNX, LLMs, vision transformers
AutomotiveASIL-ready variants
Engagement to productionUnder 6 months
Hardware IP

Chimera GPNPU

The licensable core - a general-purpose neural processing unit blending accelerator throughput with DSP programmability in one unified architecture.

Software

Chimera SDK

Toolchain and compute library for porting ML models and DSP code onto Chimera cores, with C++ kernel support.

Tools

DevStudio

Development environment for evaluating, profiling and deploying models, built around ONNX and standard frameworks.

2023

LLM & ViT support

Software ports that let existing Chimera cores run large language models and vision transformers - no silicon respin.


In Practice

What You Can Build With It

Quadric's customers are chip designers and system builders, so the "you" here is really a semiconductor team deciding what goes into next year's product. If you are building silicon for a car, Chimera gives you one core that handles both the neural perception - reading cameras and radar - and the conventional signal processing around it, in an ASIL-ready package. Tier IV of Japan, a self-driving software company, selected it for exactly this. If you are building an edge server to run language models close to where the data lives, the same architecture scales up to hundreds of TOPS and runs LLMs up to 30 billion parameters without a cloud round trip; an Asia-based edge-server LLM silicon provider is among the design wins Quadric has cited.

And if you are building for the more familiar edge - a camera, an office machine, a consumer gadget - the pitch is durability. The reason a licensable, programmable core is attractive is that your product will outlive the AI model you shipped it with, and Chimera lets you update the intelligence in software. That is the whole argument, really: the model always changes faster than the silicon, so build the silicon to change with it.

Automotive
ASIL-ready silicon
Edge LLM
on-device inference
Vision
transformers & CNNs
Industrial
robotics & automation
The Story So Far

A Decade in Milestones

2016

Quadric founded

Kheterpal, Drego and Firu leave bitcoin hardware at 21 Inc to build on-device AI silicon.

2019

$21M to advance the platform

Early funding from Pear VC, Uncork Capital and others backs the edge-AI vision.

2020

Chimera GPNPU introduced

The unified architecture that merges a neural accelerator with a DSP debuts.

2022

Series B completed

$21M plus a $10M extension; Xerox Ventures and Mesh Ventures join DENSO and MegaChips.

2023

LLM & transformer support

Vision transformer and Llama 2 support added via software ports - no hardware changes.

2025

Best Edge AI Processor IP

Chimera QC honored by the Edge AI and Vision Alliance; product revenue triples year over year.

2026

$30M Series C

Growth round led by the ACCELERATE Fund as automotive and edge-LLM design wins accelerate.


The Money

Who's Backing Quadric

The investor list tells its own story. Alongside conventional venture firms - Pear VC, Uncork Capital, Cota Capital - sit DENSO, a giant automotive supplier, and MegaChips and NSI-TEXE, semiconductor companies. When your customers and your investors are the same people, it usually means the product is being validated by the people who would actually put it in their chips. The January 2026 Series C added the ACCELERATE Fund (managed by BEENEXT) as lead, with Volta, Gentree, Wanxiang America, Pivotal and Silicon Catalyst Ventures joining.

RoundAmountDateNotable Investors
Seed / earlypart of ~$76M2017–2019Pear VC, Uncork Capital, Leawood VC
Expansionpart of ~$76M2020–2021DENSO, MegaChips, Cota Capital, NSI-TEXE
Series B$21M + $10M2022Xerox Ventures, Mesh Ventures, DENSO, MegaChips
Series C$30MJan 2026ACCELERATE Fund (BEENEXT), Uncork, Pear VC, Volta, Silicon Catalyst Ventures
The Landscape

The Field It Runs In

Quadric is not alone in licensing AI silicon. The neural-IP business includes the industry's heavyweights - Arm with its Ethos line, Cadence with Tensilica, Synopsys with ARC NPX - plus specialists like Ceva and Expedera, and edge-accelerator startups such as Hailo and SiMa.ai. Most of these draw a line between the NPU and the DSP. Quadric's whole differentiation is erasing that line. Whether "one programmable core" beats "two specialized ones" is the bet the whole company rests on - and tripling product revenue in 2025 suggests at least some chip designers are buying the argument.


Worth Knowing

Six Things That Stick

01

The founders built bitcoin-mining hardware before pivoting to AI - a school of hard-won lessons in power-per-watt efficiency.

02

Quadric has never sold a chip. Its entire product is a design that lives inside other companies' silicon.

03

One architecture spans nearly three orders of magnitude - 1 to 864 TOPS - without changing the programming model.

04

Chimera can run a 30-billion-parameter language model on-device, no cloud connection required.

05

When vision transformers broke most production NPUs, Quadric shipped support as a software update.

06

The name Chimera is literal: it fuses two normally-separate creatures - a neural accelerator and a DSP - into one.

Questions

Frequently Asked

What does Quadric make?

Quadric licenses the Chimera family of general-purpose neural processing units (GPNPUs) - processor IP cores that run machine learning inference and traditional DSP code in one unified, C++ programmable architecture.

How is a GPNPU different from a regular NPU?

A typical NPU is a fixed-function accelerator that can stall on new model types. Quadric's GPNPU is fully programmable in C++, so it can adopt new networks - including LLMs and vision transformers - through software rather than new silicon.

Who founded Quadric and when?

It was founded in 2016 by Veerbhan Kheterpal (CEO), Nigel Drego (CTO) and Daniel Firu (CPO), who previously built hardware for the bitcoin company 21 Inc.

How much funding has Quadric raised?

Roughly $76M cumulatively, including a $30M Series C announced in January 2026 led by the ACCELERATE Fund (BEENEXT), with earlier backing from DENSO, MegaChips, Pear VC and Uncork Capital.

What can Chimera run?

Chimera scales from 1 to 864 TOPS and runs ML inference, DSP and control code - including large language models up to 30 billion parameters and vision transformers - with ASIL-ready variants for automotive use.