BREAKING: GLOBALFOUNDRIES TO ACQUIRE MIPS (JULY 2025) P8700 - FIRST AI-ENABLED RISC-V AUTOMOTIVE CPU 40 YEARS OF RISC HERITAGE PHYSICAL AI IS BUILT ON MIPS I8500 SCALES TO 2,048 THREADS MIPS + CYIENT: CUSTOM RISC-V POWER SOLUTIONS SAN JOSE, CALIFORNIA BREAKING: GLOBALFOUNDRIES TO ACQUIRE MIPS (JULY 2025) P8700 - FIRST AI-ENABLED RISC-V AUTOMOTIVE CPU 40 YEARS OF RISC HERITAGE PHYSICAL AI IS BUILT ON MIPS I8500 SCALES TO 2,048 THREADS MIPS + CYIENT: CUSTOM RISC-V POWER SOLUTIONS SAN JOSE, CALIFORNIA
MIPS logo
Company Profile / Semiconductors

MIPS.

"Physical AI is Built on MIPS."

A 40-year-old Silicon Valley name that did the unthinkable: it scrapped its own chip architecture and rebuilt the whole company around the open standard it used to compete against.

// The logo of a company that has been owned by SGI, Imagination, a venture fund, a bankrupt AI startup, and - as of 2025 - GlobalFoundries. It still answers to the same four letters.

RISC-V Edge AI Automotive ~770 employees Est. 1984
The View From 2026

A legend, rebooted

Walk into the right autonomous-vehicle lab today and the brain steering the car may carry a name older than most of the engineers in the room. MIPS - four letters that once meant workstations, then game consoles, then very nearly nothing - is back, and it is running on processor IP built for machines that sense, think, act, and communicate in real time.

The company no longer sells the architecture it invented. That is the first surprising thing about MIPS in 2026. The second is that it does not seem to mind. Headquartered on Zanker Road in San Jose with roughly 770 people, MIPS now licenses compute subsystems built on RISC-V, the open instruction set that the rest of the industry rallied around. The pitch is blunt: the future of artificial intelligence is not only in distant data centers. It is in cars, robots, and factory lines, where a few milliseconds of latency is the difference between a maneuver and a collision.

"Physical AI is built on MIPS."

- The company's own one-line mission, printed without irony

MIPS calls this category Physical AI: intelligence that has to operate in the physical world, on a deadline, with safety on the line. It is a smaller, harder market than chatbots. It is also one where MIPS's old obsessions - low latency, deterministic timing, power efficiency, functional safety - suddenly read like a product roadmap instead of a museum plaque.

The Problem They Saw

Owning the maze, renting the map

For decades, the deal in chip design was simple and uncomfortable. If you wanted high-performance processor cores, you licensed them from a small number of gatekeepers, accepted their architecture, and paid for the privilege of being locked in. Proprietary instruction sets were a fine business - for the people who owned them.

MIPS had spent most of its life on both sides of that bargain. It built one of the foundational RISC architectures, watched the industry consolidate around rivals, and then got passed from owner to owner as the value of a closed instruction set eroded. The problem was structural: you could own a perfectly good architecture and still lose, because customers increasingly wanted control, not captivity.

"Customers want to move beyond proprietary legacy architecture lock-ins."

- MIPS, describing the itch RISC-V scratches

Then came AI at the edge - sensors, cameras, radar, motors - each generating torrents of data that had to be moved and acted on instantly. The old answer, ship it to the cloud and wait, does not work when a robot arm is about to swing or a vehicle is about to brake. Someone had to build the local nervous system. That someone needed an architecture customers could trust and customize. Closed wouldn't cut it.

The Bet

Kill your darling architecture

MIPS was born in 1984 out of Stanford, commercializing the RISC research of John L. Hennessy - who would later become president of Stanford and win the Turing Award - alongside co-founders including John Moussouris, Skip Stritter, and Chris Rowen. For a while it was the toast of the industry: design wins at DEC, an acquisition by Silicon Graphics, a starring role inside the Nintendo 64 and the original PlayStation.

Then the long descent. Acquired, spun out, sold, and sold again. By 2020 its then-owner, Wave Computing, filed for bankruptcy. Most stories end there. This one made a U-turn.

From the cutting-room floor

In 2021 the company emerged from bankruptcy, kept the storied name, and announced it was abandoning the MIPS architecture in favor of RISC-V. A chip-IP company walking away from its own instruction set is roughly as on-brand as a winery announcing it has decided to sell water.

The bet got a face in September 2023, when MIPS named Sameer Wasson - an 18-year Texas Instruments veteran who had rebuilt TI's processor business around automotive, industrial, and embedded AI - as CEO. His read was that the prize wasn't the architecture; it was the roadmap, the subsystems, and the markets where real-time AI actually has to work.

"Give back control, for AI-centric compute."

- The Wasson-era thesis, as summarized by EE Times
The Long Road

Four decades, six owners, one name

1984

Founded

Spun out of Stanford to commercialize the MIPS RISC architecture.

1986

R2000 ships

The first MIPS microprocessor reaches the market.

1992

Acquired by SGI

Silicon Graphics buys MIPS; chips later power the Nintendo 64 and PlayStation.

2013

Imagination Technologies

The PowerVR graphics company acquires MIPS.

2017-2018

Tallwood, then Wave

Sold to Tallwood Venture Capital, then to AI startup Wave Computing.

2021

The RISC-V pivot

Emerges from bankruptcy and abandons its own architecture for open RISC-V.

2023

Sameer Wasson, CEO

Former TI processor chief takes the wheel to drive RISC-V market penetration.

2024

P8700 launches

Billed as the first high-performance AI-enabled RISC-V automotive CPU.

2025

GlobalFoundries deal

GF announces it will acquire MIPS; it will run as a standalone business inside GF.

The Product

A nervous system, sold as IP

MIPS organizes its current portfolio - branded Atlas - around the loop every autonomous machine runs: sense, think, act, communicate. Instead of selling a single core, it sells the building blocks of a real-time compute subsystem that chipmakers and OEMs drop into their own silicon. The flagship pieces are unapologetically technical.

eVocore P8700

The industry's first high-performance, AI-enabled RISC-V automotive CPU, aimed at the low-latency, data-hungry demands of ADAS and autonomous vehicles.

Think / Compute

eVocore I8500

A power-efficient in-order multiprocessor for SoCs, fusing multi-threading with a triple-issue pipeline - scalable to 64 clusters, 512 cores, 2,048 threads.

Scale

MIPS Sense

Data-movement engines for low-latency, high-reliability processing with functional safety, coupling tightly with edge AI engines.

Sense / Data

Atlas Explorer

A virtual-platform tool to evaluate and optimize IP, subsystems, and SoCs - testing the chip before the chip physically exists.

Tools

"Each I8500 core fuses multi-threading with a highly efficient triple-issue pipeline."

- Spec-sheet poetry, MIPS edition

The business model is the same one MIPS has lived by for forty years: it does not run factories. It designs and licenses the intellectual property - the cores, subsystems, and tooling - and earns license fees and royalties when its customers ship silicon. What changed is the foundation underneath. The blueprints are now RISC-V, which means customers can extend and customize them with their own instructions rather than waiting on a vendor's permission.

The Proof

Partners, scale, and a buyer

A reboot is a story until someone signs a check. In 2025 several did. In June, MIPS and Cyient Semiconductors announced a collaboration on custom RISC-V-based intelligent power solutions for AI power delivery, industrial robotics, and automotive, built on the Atlas portfolio. MIPS had also tapped Siemens' Veloce proFPGA platform to bring up the P8700.

How far the I8500 stretches

// Maximum configuration of the eVocore I8500 multiprocessor
Clusters
64
Cores
512
Harts / Threads
2,048

Bars scaled relative to the 2,048-thread maximum. Translation: more parallelism than most engineers will ever schedule - which is exactly the headroom autonomous systems are starting to demand.

Then the big one. In July 2025, GlobalFoundries - one of the world's major chip manufacturers - announced a definitive agreement to acquire MIPS, explicitly to accelerate its AI and compute capabilities. The plan is for MIPS to keep operating as a standalone business inside GF, pairing its RISC-V processor IP with GF's manufacturing reach. After a decade of being passed between owners who didn't quite know what to do with it, MIPS was bought by one that did.

40+
years of RISC heritage
~770
employees
2,048
max threads (I8500)
2025
GF acquisition

"GlobalFoundries to acquire MIPS to accelerate AI and compute capabilities."

- GlobalFoundries, July 2025
The Mission

Make Physical AI boring

The most ambitious thing MIPS wants is, in a sense, the most modest: to make adopting Physical AI simple. Not flashy. Reliable. The company's stated aim is to deliver open, modular, safety-capable compute subsystems so that engineers building robots, vehicles, and industrial systems can assemble real-time intelligence the way you'd assemble anything else - from trusted parts, on an open standard, without betting the design on one vendor's goodwill.

"Sense. Think. Act. Communicate."

- The four verbs MIPS turned into a product line

It is a deliberately unglamorous mission for a company that once lived in living rooms via game consoles. But unglamorous is the point. Safety-critical compute is judged on what doesn't happen - the crash avoided, the deadline met, the worst case that stayed hypothetical.

Why It Matters Tomorrow

The brain in the machine

If AI keeps escaping the data center and moving into the physical world - and the momentum behind robotics, autonomous vehicles, and industrial automation suggests it will - then someone has to supply the local intelligence those machines run on. That intelligence has to be fast, safe, power-thrifty, and open enough to customize. MIPS has spent forty years accidentally training for exactly this exam.

Backed by GlobalFoundries' factories and anchored to the open RISC-V standard, the company is no longer fighting to own an architecture. It is fighting to be the default subsystem inside the next generation of thinking machines. Whether it wins is unknown. That it gets to compete again, after the obituaries were half-written, is the part nobody saw coming.

"Beyond proprietary lock-in: an open standard, a 40-year roadmap, and a second act."

- The short version of the MIPS story

Return, for a moment, to that autonomous-vehicle lab. The car edges forward, reads the road, and brakes a half-second before a human would have noticed the reason. The name on the silicon doing the thinking is older than the lab, older than RISC-V, older than the idea of Physical AI itself. It just learned a new architecture - and quietly went back to work.

Spread the word

Share this profile

If a 40-year-old chip company reinventing itself counts as a comeback, tell someone.