Breaking
First analog IC designed entirely by software - Mar 2025 Series A: $20M from Maverick Silicon ChipHUB platform reports 10x productivity gain Buck converter taped out in days, not months ~190 engineers in Alameda, CA Founded 2018 by Calum MacRae Featured: Latham & Watkins "growth rocketship"
Celera Semiconductor logo
Celera HQ - Alameda, CA / The chip is the messenger
Yespress / Company Profile

Celera Corporation: the analog chip that designed itself

An Alameda outfit decided analog silicon shouldn't take eighteen months and a small army. The result: a buck converter, designed by software, in days.

Founded 2018 Alameda, CA ~190 People Series A · $20M NAICS 33441

01 / NowWhere the wafer meets the algorithm

On a quiet block off Harbor Bay Parkway, a small team is doing something the analog chip industry quietly insisted was impossible. They are letting the computer draft the chip.

Inside Celera, engineers feed a behavioral spec - voltages, currents, the usual constraints - into a platform called ChipHUB. Hours later, the system hands back a netlist, a layout, and a path to tapeout. The humans review it. The foundry builds it. The thing works.

It is, by industry custom, a little rude. Analog design has been a craft for sixty years - apprenticeship, intuition, late nights with SPICE. Celera is not against the craft. Celera is against waiting eighteen months for it.

Analog IC design is the last great handcrafted thing in tech. Celera is the unhandcrafting.- Editor's note

02 / The ProblemThe bottleneck nobody wanted to name

Digital chips got Moore's Law, EDA tools, and an entire generation of automation. Analog got Calum MacRae and a thousand people like him: deeply skilled, painfully scarce, and unable to be cloned.

The math is unforgiving. Every car, every phone, every solar inverter needs analog and mixed-signal silicon. Demand keeps climbing. The supply of senior analog engineers does not. You can either wait, pay, or both.

OEMs solved it the way they solve most things - by sucking it up. Custom power-management IC? Plan on a year. Maybe more. Maybe a respin. Maybe two.

The analog IC market is roughly $80 billion. It still runs on a workflow that would feel familiar to an engineer from 1989.- Industry snapshot

03 / The BetCalum MacRae's quiet rebellion

MacRae founded Celera in 2018 with a thesis that was less moonshot than slow boil: the steps a senior analog designer takes - synthesis, modeling, verification, layout - can be encoded. Not perfectly. Just well enough.

Most analog veterans hated this idea. Many still do. The interesting wrinkle is that Celera's team is mostly analog veterans. They are the ones who decided to write the software that does their old job.

We're not replacing analog engineers. We're letting them ship ten things instead of one.- Paraphrased company line

Milestones / a short history of an impatient idea

2018
Celera Incorporated founded in Alameda by Calum MacRae.
2021
Featured in Semiconductor Review as a top semiconductor tech company.
2023
ChipHUB platform matures; Nestos digital-twin library introduced.
Mar 2025
First analog IC fully designed by software is sampled - a high-performance buck converter.
Aug 2025
Closes $20M Series A led by Maverick Silicon.
2026
Team scales to ~190; expanding mixed-signal and PMIC offerings.
The timeline above is shorter than most analog tapeouts. That is roughly the point.

04 / The ProductChipHUB, Nestos, and the work the humans still do

ChipHUB is the platform. Under the hood: behavioral modeling, behavioral synthesis, verification algorithms, and layout algorithms - each one trained to do what a senior engineer would do, only faster and without lunch breaks.

Nestos is the library. Think of it as digital twins for transistors, characterized against industry-standard silicon processes so the platform can produce predictable results on real fabs - not just in simulation.

What customers actually get

OEMs hand Celera a spec. Celera hands them back a custom analog or mixed-signal IC, designed, verified, and ready for fabrication. Or, if the customer prefers, IP they can drop into their own SoC. Same platform, two delivery models.

ChipHUB Nestos Behavioral Synthesis Digital Twin IP PMIC Mixed-Signal Auto Layout Verification AI
The first time you watch a layout finish without a human touching it, you either laugh or you panic. There is no third response.- Anonymous EDA observer

05 / The ProofNumbers, and the things they imply

The thesis only matters if it ships. In March 2025 it did. Celera taped out and sampled a high-performance buck DC-to-DC converter that was designed entirely by ChipHUB. From specification to manufacturing release: days.

Spec → Tapeout, by approach

Legacy analog flow
~12-18 mo
Industry-best EDA + senior team
~6-9 mo
Celera ChipHUB
days
Source: Celera press materials, March 2025. Bars approximate; specifics vary by complexity and process node.
10x
Productivity gain
$23M
Total raised
190
Team size
2018
Founded

Maverick Silicon led the $20M Series A in August 2025. Latham & Watkins, the law firm that has watched a generation of semiconductor companies come and go, called Celera a "growth rocketship." Law firms are not normally given to that vocabulary.

If you can compress a year into a week, you don't just save time. You change which products are possible.- A customer, paraphrased

06 / The MissionOn-time, on-budget, on-silicon

Celera's stated mission is almost boring: deliver custom analog IC solutions on-time and on-budget. The trick is that nobody in the analog world delivers on either with much reliability. Calling it boring is a sort of luxury.

What it really means: take the 80% of analog design that is patternable, hand it to software, and let the humans focus on the 20% that actually requires a human. Net result - more chips, faster, with fewer respins, at smaller team sizes.

The future of analog is not fewer engineers. It's the same engineers, with leverage.- Celera, in summary

07 / TomorrowWhy this matters past 2026

Cars need more analog. Renewables need more analog. AI data centers - yes, the digital ones - need staggering amounts of power management, which is analog. Every clean-energy transition assumption sitting in a pitch deck somewhere quietly depends on more analog ICs shipping than the current process can supply.

If Celera is right, the supply curve gets a new slope. If Celera is wrong, the industry stays a craft economy and we all wait. Either way, the answer is now testable in silicon - which is more than you could say about it a year ago.

08 / Back to Harbor BayThe quiet block, revisited

Back on Harbor Bay Parkway, the lights are on late. A team is reviewing layouts they did not draw. A spec comes in. A chip goes out. The handcraft is still there - it has just moved up a level.

Sixty years of analog tradition is not over. It now has a co-pilot, and the co-pilot is fast.

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