# Synopsys Inc

> Synopsys is the quiet giant behind the world's chips. Its electronic design automation (EDA) software, semiconductor IP, and AI-driven design tools are used to design and verify nearly every advanced silicon chip on the planet - from smartphone processors to AI accelerators. Founded in 1986 by Aart de Geus and led today by CEO Sassine Ghazi, the Sunnyvale company turned the impossibly hard task of laying out billions of transistors into a software problem, and now layers AI on top of it. Its 2025 acquisition of simulation leader Ansys pushed it deeper into multiphysics and systems engineering.

- **Founded:** 1986
- **Headquarters:** Sunnyvale, California, United States
- **Founders:** Aart de Geus (Co-founder, Executive Chairman (former CEO 1986-2024)), David Gregory (Co-founder), Bill Krieger (Co-founder)
- **Team size:** ~28,000 employees (pre-Ansys); significantly larger following the Ansys integration
- **Products:** Fusion Compiler, DSO.ai, Synopsys.ai, VCS, VC Formal
- **Notable:** Co-founder Aart de Geus led the company for ~37 years and completed 100+ acquisitions., Pioneered commercial logic synthesis, a foundational EDA technology., Surpassed 500 customer tapeouts on Fusion Compiler across 40nm-3nm nodes.

## Products & services

- **Fusion Compiler** — RTL-to-GDSII physical implementation solution for digital chip design; 500+ tapeouts from 40nm to 3nm.
- **DSO.ai** — First autonomous AI application for chip design; uses reinforcement learning to optimize power, performance, and area.
- **Synopsys.ai** — Full-stack AI-driven EDA suite spanning design (DSO.ai), verification (VSO.ai), test (TSO.ai), analog (ASO.ai), 3D (3DSO.ai), plus a generative-AI Copilot.
- **VCS** — Industry-standard functional verification and simulation engine for digital designs.
- **VC Formal** — Formal verification solution for exhaustively verifying complex SoCs and finding deep corner-case bugs.
- **DesignWare / Synopsys IP** — Broad catalog of silicon-proven interface, foundation, security, and processor IP (PCIe, USB, DDR, Ethernet, ARC processors).
- **ZeBu / HAPS** — Hardware-assisted emulation and FPGA-based prototyping systems for pre-silicon software bring-up.
- **Ansys multiphysics simulation** — Following the 2025 acquisition: structural, fluids, electromagnetics, and optical simulation (Fluent, HFSS, Mechanical, LS-DYNA).

## Achievements

- Co-founder Aart de Geus led the company for ~37 years and completed 100+ acquisitions.
- Pioneered commercial logic synthesis, a foundational EDA technology.
- Surpassed 500 customer tapeouts on Fusion Compiler across 40nm-3nm nodes.
- Launched DSO.ai, the first autonomous AI application for chip design.
- Grew to ~$7B annual revenue and a near-duopoly position in EDA.
- Completed the landmark ~$35B acquisition of Ansys in 2025, merging design and simulation.

## Latest updates

- **2026-04** — Partnered with TSMC to power next-generation AI systems with silicon-proven IP and certified EDA flows, including agentic-AI run assistance on TSMC's A14 process.
- **2026-03** — Outlined its 'Engineering the Future' vision integrating EDA, IP, and Ansys simulation across silicon-to-systems.
- **2025** — Closed the ~$35 billion acquisition of Ansys, adding multiphysics simulation and systems-engineering software.
- **2024-01** — Sassine Ghazi became President and CEO; co-founder Aart de Geus transitioned to Executive Chairman.

## Links

- Website: https://www.synopsys.com
- LinkedIn: https://www.linkedin.com/company/synopsys
- Twitter/X: https://twitter.com/synopsys
- GitHub: https://github.com/Synopsys
- YouTube: https://www.youtube.com/user/SynopsysVideos
- Instagram: https://www.instagram.com/synopsysinc/
- Facebook: https://www.facebook.com/Synopsys

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Profile page: https://yespress.io/synopsys-inc
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Last updated: 2026-06-01